The European Reference Fab
Blueprint For A Trustworthy And Transparent Manufacturing Network
The Transparent Reference Fab (TRF) initiative proposes a scalable 300-mm manufacturing blueprint to strengthen Europe’s security, resilience and semiconductor sovereignty. It combines an industrial 130-nm baseline with an optional evolution to 65 nm and an integrated chiplet, packaging and test flow, built on open design kits, auditable processes and a dedicated RefFab Academy for workforce development.
Developed by experts from the HEP-Alliance, RheinMain University of Applied Sciences and Swissbit, the concept treats trusted manufacturing for selected chip classes as public-interest infrastructure rather than a standalone speculative fab project.
Affiliations are for identification only; views are personal.
“We don’t need a perfect fab — we need a blueprint others can trust, adopt, and multiply.”
The concept in four points
- Trustworthy 130/65-nm manufacturing: Evergreen CMOS nodes for analogue/mixed-signal, MCUs, PMIC, RF and IoT, with long-term availability (≥ 15 years) and auditable process baselines.
- Integrated chiplet, packaging & test flow: Co-packaging of leading-edge compute dies with 65-nm periphery, system-in-package flows and qualified ATE/SLT, aligned with emerging chiplet standards (e.g. UCIe/BoW/OpenHBI).
- Public-interest infrastructure logic: Designed as critical infrastructure with public-private risk-sharing, long-term demand anchors (defence, critical infrastructure, public administration) and a realistic capacity corridor of a few thousand 300-mm wafer starts per month.
- Network blueprint, not a single flagship: Validates an open, transparent blueprint (process bricks, governance and training) that can be cloned in multiple European regions, including Central and Eastern Europe, to avoid a “two-speed” Europe.
English
- Executive Summary with Key Clarifications (Q&A) – v2025-11-27, 12 pages <-- Download
Concise overview of the Transparent Reference Fab concept, followed by a short Q&A addressing the most frequent questions from RTOs, industry and policy stakeholders (relation to pilot lines, 130/65-nm focus, capacity corridor, governance, European network logic).
Version note:
The Executive Summary with Key Clarifications (Q&A) reflects the most recent internal updates and the input submitted to the EU “Chips Act 2” consultation (27 November 2025).
The full concept paper (v2025-11-20) will be updated in a later iteration. Where details differ, the Executive Summary + Q&A should be considered the leading version.
- Full concept paper – The European Reference Fab – v2025-11-20, ~30+ pages <-- Download
Extended technical and economic concept, including process and node choices, financial corridors, governance options and workforce strategy.
German
Hinweis zur deutschen Fassung:
Die nachfolgenden deutschen Dokumente stammen aus einer frühen Arbeitsversion (Stand: 09.11.2025) und werden derzeit nicht aktiv aktualisiert.
Die maßgebliche und aktuell gepflegte Fassung ist das englische Executive Summary with Key Clarifications (Q&A), Version 27.11.2025.
All papers are research-driven concept documents developed in the context of the HEP Alliance. They outline first implementation ideas and serve as a basis for stakeholder consultation. Figures are indicative and will be validated during Phase 0 feasibility studies.